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Norm

IEEE 1012-2012

Ausgabedatum: 2012 05 25

IEEE Standard for System and Software Verification and Validation

Revision Standard - Superseded. Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the req...
Weiterlesen
Gültig
Herausgeber:
Institute of Electrical and Electronics Engineers
Format:
Digital | 223 Seiten
Sprache:
Englisch
Revision Standard - Superseded. Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused [legacy, commercial off-the-shelf (COTS), nondevelopmental items]. The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of products.